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Lattice Semiconductor Unveils Groundbreaking PQC-Ready FPGA Family: MachXO5-NX TDQ

Last updated: October 13, 2025
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1. Introduction to MachXO5-NX TDQ

Lattice Semiconductor (NASDAQ: LSCC) has taken a significant step forward in the realm of cybersecurity with the launch of its MachXO5™-NX TDQ family, touted as the industry's first secure control FPGAs equipped with full Commercial National Security Algorithm (CNSA) 2.0-compliant post-quantum cryptography (PQC). Officially announced on October 13, 2025, this innovative product aims to address the imminent threats posed by quantum-enabled cyberattacks across various sectors including Computing, Communications, Industrial, and Automotive.

2. The Urgency of Quantum-Resistant Security

Esam Elashmawi, Chief Strategy and Marketing Officer at Lattice Semiconductor, emphasized the urgency of adopting quantum-resistant security measures. “Quantum computing advances increase the urgency to adopt quantum-resistant security across every industry,” he stated. The MachXO5-NX TDQ family not only meets current security mandates but also introduces features like crypto-agility and a hardware root of trust, positioning customers’ infrastructures to adapt to evolving security threats.

3. Key Features of the MachXO5-NX TDQ Family

Comprehensive CNSA 2.0 Compliant PQC

The MachXO5-NX TDQ family is the first to offer a complete suite of CNSA 2.0 and NIST-approved PQC algorithms. This includes:

  • LMS, XMSS, ML-DSA, ML-KEM: Algorithms tailored to safeguard against quantum threats.
  • AES256-GCM, SHA2, SHA3, SHAKE: Advanced encryption standards ensuring robust data protection.
  • Authenticated and Encrypted Bitstream: Enhances data integrity and prevents unauthorized access through advanced algorithms.

Advanced Cryptography Capabilities

Beyond PQC, the MachXO5-NX TDQ FPGAs also include a full range of advanced symmetric and asymmetric cryptographic algorithms:

  • AES-CBC/GCM (256 bit)
  • ECDSA (384/521)
  • SHA (384/512)
  • RSA (3072/4096 bit)

These features are crucial for protecting both bitstream and user data, ensuring comprehensive security.

Hardware Root of Trust (RoT)

A standout feature of the MachXO5-NX TDQ family is its Hardware Root of Trust, which includes:

  • Trusted Single-Chip Boot: Integrated flash ensures secure booting processes.
  • Unique Device Secret (UDS): Guarantees distinct device identities, enhancing security.
  • Flexible Memory Management: Integrated non-volatile configuration memory and user flash memory allow for customized partitioning and secure locking.

Moreover, the devices are designed to withstand side-channel attacks (SCA) and comply with the NIST Cryptographic Algorithm Validation Program (CAVP).

4. Expansion of the RoT-Enabled Device Family

In addition to the MachXO5-NX TDQ, Lattice has expanded its RoT-enabled MachXO5-NX device family with new MachXO5-NX TD devices. These models offer enhanced density and package options, catering to a broader range of customer needs. The new devices have already begun shipping to leading customers in the Communications and Computing sectors, supported by the latest release of Lattice Radiant™ design software.

5. Experience Innovation at the OCP Global Summit

Lattice Semiconductor will showcase live demonstrations of its MachXO5-NX TDQ and other FPGA solutions at the OCP Global Summit, scheduled for October 14–16, 2025, at the San Jose Convention Center. Attendees can visit Lattice at Booth #A23 to explore the future of secure, AI-optimized datacenter infrastructure.

6. Conclusion

With the introduction of the MachXO5-NX TDQ family, Lattice Semiconductor has established itself as a frontrunner in the race to provide quantum-resistant security solutions. As the threat landscape evolves with advancements in quantum computing, Lattice is committed to equipping its customers with the necessary tools to safeguard their infrastructures against emerging cyber threats. This launch marks a pivotal moment in the semiconductor industry, underscoring the importance of proactive security measures in a rapidly changing technological environment.

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