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Lam Research and IBM Forge New Path in Sub-1nm Logic Scaling

Last updated: March 10, 2026
Taurigo

On March 10, 2026, Lam Research Corporation (NASDAQ: LRCX) and IBM (NYSE: IBM) announced a significant collaboration aimed at advancing sub-1nm logic scaling in semiconductor technology. This partnership builds on over a decade of successful joint efforts, focusing on the development of innovative materials and processes that will facilitate the next generation of logic devices.

1. A Long-Standing Partnership

The collaboration is the latest chapter in a productive relationship that has seen both companies contribute to the evolution of semiconductor fabrication technologies. Notably, their previous work enabled the development of early generations of 7nm technology, nanosheet architectures, and extreme ultraviolet (EUV) lithography processes. With this new five-year agreement, the focus is set on tackling the challenges associated with scaling down to sub-1nm nodes.

Mukesh Khare, General Manager of IBM Semiconductors and Vice President of Hybrid Cloud at IBM Research, emphasized the importance of this partnership: “Lam has been a critical partner to IBM for over a decade, contributing to key breakthroughs in logic scaling and device architecture such as nanosheet and the world's first 2nm node chip, unveiled by IBM in 2021.”

2. Objectives of the Collaboration

The partnership will work on several fronts to enhance semiconductor technology:

  1. New Materials: Exploring novel materials that can support advanced logic scaling.
  1. Advanced Fabrication Processes: Developing etch and deposition capabilities tailored for increasingly complex device architectures.
  1. High NA EUV Lithography: Innovating lithography processes that will be crucial for next-generation interconnect and device patterning.

Vahid Vahedi, Chief Technology and Sustainability Officer at Lam Research, noted, “As the industry enters a new era of 3D scaling, progress depends on rethinking how materials, processes, and lithography come together as a single, high-density system.”

3. Leveraging Advanced Research and Technologies

The collaboration will utilize IBM's advanced research capabilities at the NY Creates Albany NanoTech Complex, coupled with Lam's comprehensive range of end-to-end process tools and innovations. These include:

  • Aether® Dry Resist Technology: Critical for High-NA EUV lithography.
  • Kiyo® and Akara® Etch Platforms: For precise patterning and material removal.
  • Striker® and ALTUS® Halo Deposition Systems: To ensure optimal material application.
  • Advanced Packaging Technologies: To enhance device performance and integration.

Together, these capabilities aim to validate full process flows for nanosheet and nanostack devices, ensuring that High-NA EUV patterns can be reliably transferred to real device layers with high yield.

4. Implications for the Semiconductor Industry

The move to sub-1nm logic devices is a crucial step forward in addressing the growing demands of applications, particularly in the realm of artificial intelligence and data processing. By advancing these technologies, Lam Research and IBM are not only positioning themselves at the forefront of semiconductor innovation but also ensuring a viable future for the industry.

As the collaboration unfolds, stakeholders in the semiconductor sector will be keenly observing the developments, as the innovations stemming from this partnership are expected to significantly impact the performance and capabilities of next-generation chips.

In summary, the collaboration between Lam Research and IBM heralds a new era of innovation in semiconductor technology, with the potential to redefine the limits of logic device scaling and performance.

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