Arteris Unveils Next-Gen Magillem Registers for Enhanced SoC Integration

On February 25, 2025, Arteris Inc. (Nasdaq: AIP), a prominent provider of system IP aimed at accelerating system-on-chip (SoC) creation, announced the immediate availability of its latest generation of Magillem Registers technology. This innovative product is designed to automate the hardware/software integration process, significantly reducing development time and empowering design teams to tackle the challenges posed by increasing design complexity.

Magillem Registers serves as a comprehensive register design and management solution that streamlines the hardware/software interface (HSI) allowing rapid development of chips and chiplets. The technology is particularly versatile, catering to a wide range of applications from Internet of Things (IoT) devices to complex AI datacenter multi-die SoCs. By reducing development timelines by an impressive 35% compared to in-house solutions, Magillem Registers enables teams to reallocate resources towards innovation.

The latest release builds on the established success of Magillem 5 and CSRCompiler technologies, offering notable improvements in performance, capacity, and usability. Users can expect up to three times faster performance than Magillem 5, with the ability to compile millions of registers in just minutes. Furthermore, the new version supports a fivefold increase in design size, scaling effortlessly from small devices to extensive multi-die configurations containing millions of control registers.

With the addition of IEEE 1685-2022 (IP-XACT) and SystemRDL 2.0, Magillem Registers enhances its support for industry standards, facilitating better intellectual property (IP) reuse and compatibility with third-party vendors. This development is crucial for improving SoC integration, as it addresses the diverse needs of modern design environments.

The latest iteration of Magillem Registers introduces significant usability advancements that promote productivity among design teams. The solution features a rapid, highly iterative design environment with streamlined input, intuitive document navigation, and customizable workflows. By eliminating repetitive, time-consuming tasks through intelligent automation, teams can focus on higher-value activities, thereby addressing the growing demands of complex SoC designs.

K. Charles Janac, president and CEO of Arteris, highlighted the critical nature of addressing hardware and software integration challenges, particularly in the face of increasing chip complexity and size driven by AI technology. Janac noted that with over 70% of chips requiring respins, the latest Magillem Registers release is pivotal in maximizing SoC engineering productivity and significantly reducing project risks, thereby aiding in cost control.

Arteris’ latest Magillem Registers technology represents a significant advancement in SoC integration automation, designed to empower design teams and enhance productivity. As the demand for more sophisticated chips continues to rise, the introduction of this technology positions Arteris as a leading force in the semiconductor industry.

For further information about Magillem Registers, interested parties can visit Arteris' official website.

Arteris is a leading provider of system IP focused on accelerating SoC development for modern electronic systems. The company’s network-on-chip (NoC) interconnect IP and SoC integration automation technologies enhance product performance, decrease power consumption, and speed up time to market, ultimately delivering better SoC economics for its clients.

For more insights into Arteris’ innovations and offerings, please visit arteris.com.